The invention relates generally to data signal generation and, more particularly, the invention relates to a circuit for clamping data signals delivered from a circuit.
Testing equipment has been used for many years to evaluate the performance of integrated circuits prior to their shipment to customers. Among other things, testing equipment typically includes a large number of xe2x80x9cpin cardsxe2x80x9d that each have circuitry for communicating with one corresponding pin of the integrated circuit being tested (referred to in the art as the xe2x80x9cdevice under test,xe2x80x9d or xe2x80x9cDUTxe2x80x9d). Each pin card may include one or more so-called xe2x80x9cpin driversxe2x80x9d for transmitting a test signal to its corresponding pin on the DUT. To that end, the pin driver typically is connected to its corresponding pin via a relatively short transmission line. For additional background information relating to testing equipment and pin drivers, see U.S. Pat. No. 5,010,297, the disclosure of which is incorporated herein, in its entirety, by reference.
During testing, the DUT often transmits signals back to the pin driver across the transmission line. There are instances, however, when such signals produce reflections (at the pin driver) that are reflected back to the DUT. Among other problems, reflections undesirably can distort data transmissions between the two devices. The art has responded to this problem by connecting a reflection clamp to the output pin of the pin driver to clamp the reflections to a specified minimum and/or maximum value. Such reflection clamps, however, also present a number of other problems. For example, such reflection clamps often consume excessive space in the layout, add capacitance, consume excessive power, and compromise the signal integrity of the data signals transmitted and received between the DUT and the pin driver.
In accordance with one aspect of the invention, a clamp for use with a circuit (having an output for delivering an output voltage) forms a voltage boundary for the output voltage based upon a clamp voltage. To that end, the clamp includes a clamp input for receiving the clamp voltage, a clamp transistor, and a control transistor. The clamp transistor has an input node (in communication with the clamp input) with a substantially fixed voltage based upon the clamp voltage. The clamp transistor also has a second terminal. The control transistor has an input node in communication with the output, and a second terminal. The second terminals of the clamp transistor and the control transistor are in communication with a current source that delivers current to at least one of the two transistors. The clamp transistor and control transistor receive current from the current source based upon the voltage difference between their respective input node and second terminal. The output is clamped at a voltage within the voltage boundary after the clamp transistor begins receiving current from the current source.
In some embodiments, the clamp prevents the output voltage from being higher than the clamp voltage. In other embodiments, the clamp prevents the output voltage from being lower than the clamp voltage. The clamp transistor and the control transistor may be one of field effect transistors and bipolar junction transistors. In addition, the control transistor also may function as a part of the circuit delivering the output voltage.
The output may be clamped at the voltage within the voltage boundary after the control transistor stops receiving current from the current source. In some embodiments, the clamp further includes a bridge coupled between the clamp input and the input node of the clamp transistor. The bridge produces the substantially fixed voltage upon the input node of the clamp transistor.
In accordance with another aspect of the invention, a clamp for use with a circuit (having an output for delivering an output voltage) forms a voltage boundary for the output voltage based upon a clamp voltage. To that end, the clamp includes a clamp input for receiving the clamp voltage, a clamp transistor in communication with the clamp input, and a control transistor in communication with the output. The clamp also includes a driving source for driving at least one of the clamp and control transistors based upon the voltage at the clamp input and the voltage at the output. The output is clamped at a voltage within the voltage boundary of the clamp voltage after the clamp transistor begins being driven by the driving source.